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| Elulookirjeldus (CV) | ||
| 1. | Eesnimi | Maksim |
| 2. | Perekonnanimi | Jenihhin |
| 3. | Töökoht | ELIKO Tehnoloogia arenduskeskus OÜ |
| 4. | Ametikoht | Arendusinsener |
| 5. | Sünniaeg | 09.06.1981 (päev.kuu.aasta) |
| 6. | Haridus | 2004, astusin doktoriõppesse, TTÜ, Arvutitehnika Instituut 2004, tehnikateaduste magister, TTÜ, Arvuti- ja Süsteemitehnika eriala 2003, tehnikateaduste bakalaureus, TTÜ, Arvuti- ja Süsteemitehnika eriala 1999, keskharidus, Jõhvi Vene Gümnaasium |
| 7. | Teenistuskäik | 2004 - ... ELIKO OÜ Tehnoloogia Arenduskeskus, arendusinsener 2003 - 2004 Borthwick-Pignon OÜ, testinsener 2003 Arvutitehnika instituut, TTÜ, insener 2003 ESLAB, Linköpingi Ülikool (Rootsi), insener 2000 - 2002 oma väike firma (Normand OÜ), kaasasutaja |
| 8. | Teaduskraad | Tehnikateaduste magister |
| 9. | Teaduskraadi välja andnud asutus, aasta |
Tallinna Tehnikaülikool, 2004 |
| 10. | Tunnustused | Jaan Poska stipendium, Tallinna Linnavalitsus, 15. mai 2005.a. II preemia tehnikateaduste valdkonnas Eesti üliõpilaste teadustööde konkursil, Eesti Haridus- ja Teadusministeerium, 10. detsember 2004.a. |
| 11. | Teadusorganisatsiooniline ja –administratiivne tegevus |
|
| 12. | Juhendamisel kaitstud väitekirjad |
|
| 13. | Teadustöö põhisuunad | Digitaalsüsteemide diagnostika ja test, isetesti uurimine |
| 14. | Jooksvad grandid | |
| 15. | Teaduspublikatsioonid |
An Iterative Approach to Test Time Minimization for Parallel Hybrid BIST Architecture, Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng, The 5th IEEE Latin-American Test Workshop, Cartagena, Colombia, March 8-10, 2004, pp. 98-103 Hybrid BIST optimization for core-based systems with test pattern broadcasting. Ubar, R.; Jenihhin, M.; Jervan, G.; Zebo Peng; In: Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications. Los Alamitos, CA, USA: IEEE Comput. Soc, 2004. p. 3-8. Conference Paper. Hybrid BIST time minimization for core-based systems with STUMPS architecture. Jervan, G.; Eles, P.; Peng, Z.; Ubar, R.; In: Proceedings. 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. Los Alamitos, CA, USA: IEEE Comput. Soc, 2003. p. 225-32. Conference Paper. Test time minimization for hybrid BIST of core-based systems. Jervan, G.; Eles, P.; Peng, Z.; Ubar, R.; In: Proceedings of the Twelfth Asian Symposium, ATS 2003. Los Alamitos, CA, USA: IEEE Comput. Soc, 2003. p. 318-23. Conference Paper. Test Time Minimization for Hybrid BIST with Test Pattern Broadcasting, Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng, The 21st NORCHIP Conference, November 10-11, 2003, pp. 112-116 |
viimati muudetud: 26.09.2005
| Curriculum Vitae (CV) | ||
| 1. | First Name | Maksim |
| 2. | Surname | Jenihhin |
| 3. | Institution | ELIKO Competence Center in Electronics-, Info- and Communication Technologies |
| 4. | Position | Development Engineer |
| 5. | Date of birth | 09.06.1981 (day.month.year) |
| 6. | Education | 2004, Ph.D. student at TUT 2004, M.Sc. in Computer Engineering, TUT 2003, B.Sc. in Computer Engineering, TUT 1999, Secondary Education from Russian High School of Jõhvi |
| 7. | Research and professional experience |
2004 - ... ELIKO OÜ Competence Center in Electronics-, Info- and Communication Technologies, Development Engineer 2003 - 2004 Borthwick-Pignon Solutions, Test Engineer 2003 PLD Lab, Tallinn University of Technology, Researcher 2003 ESLAB, Linköping University, Sweden, Researcher 2000 - 2002 Self-employed (Normand Ltd), Co-founder |
| 8. | Academic degree | Master of Science in Computer Engineering |
| 9. | Dates and sites of earning the degrees |
Tallinn University of Technology, 2004 |
| 10. | Honours/awards | Jaan Poska scholarship, Tallinn Council, 15th of May 2005 II prize at the contents of student works by Estonia Ministry of Education and Research, 10th of December 2004 |
| 11. | Research-administrative experience |
|
| 12. | Supervised dissertations | |
| 13. | Current research program | Testing of Digital Systems, Built-In Self-Test |
| 14. | Current grant funding | |
| 15. | List of most important publications |
An Iterative Approach to Test Time Minimization for Parallel Hybrid BIST Architecture, Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng, The 5th IEEE Latin-American Test Workshop, Cartagena, Colombia, March 8-10, 2004, pp. 98-103 Hybrid BIST optimization for core-based systems with test pattern broadcasting. Ubar, R.; Jenihhin, M.; Jervan, G.; Zebo Peng; In: Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications. Los Alamitos, CA, USA: IEEE Comput. Soc, 2004. p. 3-8. Conference Paper. Hybrid BIST time minimization for core-based systems with STUMPS architecture. Jervan, G.; Eles, P.; Peng, Z.; Ubar, R.; In: Proceedings. 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems. Los Alamitos, CA, USA: IEEE Comput. Soc, 2003. p. 225-32. Conference Paper. Test time minimization for hybrid BIST of core-based systems. Jervan, G.; Eles, P.; Peng, Z.; Ubar, R.; In: Proceedings of the Twelfth Asian Symposium, ATS 2003. Los Alamitos, CA, USA: IEEE Comput. Soc, 2003. p. 318-23. Conference Paper. Test Time Minimization for Hybrid BIST with Test Pattern Broadcasting, Raimund Ubar, Maksim Jenihhin, Gert Jervan, Zebo Peng, The 21st NORCHIP Conference, November 10-11, 2003, pp. 112-116 |
last updated: 26.09.2005
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