| title: | High-Level Test Generation and Testability Analysis for Digital Circuits |
|---|---|
| reg no: | ETF5637 |
| project type: | Estonian Science Foundation research grant |
| subject: |
2.9. System Engineering and Computer Technology |
| status: | completed |
| institution: | TTU Faculty of Information Technology |
| head of project: | Jaan Raik |
| duration: | 01.01.2003 - 31.12.2005 |
| description: | The main goal of the project is to develop new methods and software for test generation and testability analysis at high design abstraction levels of complex digital circuits. The problems to be investigated include: - High-level fault models and their accuracy assessment at the logic level - Decision diagram circuit model generation from hardware description language VHDL - Application of testability measures in improving the quality of high-level test - Constraints in high-level test path activation and constraint satisfaction methods - Automatic detection of time-frame limits for the test in order to reduce the search space in high-level test generation The following results are expected of the project: - New, accurate high-level fault model based on combining scanning and conformity tests and its application in high-level test pattern generation - Method and software for generating decision diagrams from hardware description language VHDL - New algorithm and software for testability analysis for high-level test pattern generation - New, deterministic algorithm and software for solving constraints in high-level test generation - Methods and tool for detecting optimal time-frame limits in high-level test generation - Integration of the methods and tools created during the project to the test generation system DECIDER that is being developed at Tallinn TU - Carrying out experiments on internationally acknowledged benchmark circuits in order to assess the efficiency of the implemented results |
| project group | ||||
|---|---|---|---|---|
| no | name | institution | position | |
| 1. | Eero Ivask | Tallinn Technical University | researcher | |
| 2. | Elmet Orasson | Tallinn Technical University | senior engineer | |
| 3. | Jaan Raik | TTU Faculty of Information Technology | senior researcher | |